CVE-2026-79979 Entradas TLB obsoletas tras page-out por demand paging permiten a hilos de usuario arm64 acceder a marcos…
invalidate_tlb_page() en arch/arm64/core/mmu.c emitía TLBI VAE1{IS} con un operando virt 12, que codifica el ASID en los bits [63:48], por lo que la invalidación solo coincidía con ASID 0 y entradas globales. Los dominios de memoria usan ASID desde 1 y sus hojas privadas se mapean como no globales, por lo que la traducción en caché sobrevivía a la invalidación. Así, tras el page-out de un marco, hilos de usuario arm64 podían acceder a marcos físicos reutilizados.
CVSS 3.1
- Probabilidad de explotación0,1 %
- Explotada activamenteNo confirmada
- Exploit públicoNo conocido
Afectados
zephyrproject zephyr
desde 4.3.0 hasta antes de 4.5.0
Qué hacer
- Verificá si usás zephyr y en qué versión.
- Actualizá a la versión corregida que indique el fabricante en su aviso o aplicá su mitigación.
- Revisá registros y accesos de los sistemas expuestos para descartar un uso previo.
Calculadora CVSS
CVSS 3.1 · 7.8 ALTA
CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:H/A:H
- Vector de ataqueLocal
- Complejidad del ataqueAlta
- Privilegios requeridosBajos
- Interacción del usuarioNinguna
- AlcanceCambiado
- ConfidencialidadAlta
- IntegridadAlta
- DisponibilidadAlta
Descripción original
The arm64 MMU backend invalidates a single virtual address from the TLB with invalidate_tlb_page() in arch/arm64/core/mmu.c, which issued TLBI VAE1{IS} with an operand of virt >> 12. That operand encodes the ASID in bits [63:48], so the invalidation only ever matched ASID 0 (the kernel page tables) and global entries. Memory domains, however, are allocated ASIDs starting at 1 in arch_mem_domain_init(), and every domain-private leaf created by private_map() is mapped with MT_NG, i.e. non-global. A domain's cached translation therefore survived the invalidation.
All callers of invalidate_tlb_page() are demand-paging paths. When the eviction algorithm reclaims a frame, page_frame_prepare_locked() in kernel/mmu.c calls arch_mem_page_out(), which marks the kernel leaf invalid, propagates the invalid descriptor into every domain via sync_domains(), and then flushes only ASID 0. do_page_fault() immediately reuses the very same page frame for the incoming mapping through arch_mem_page_in(). A user thread that had already touched the evicted page — a k_mem_partition added with arch_mem_domain_partition_add(), or its own stack mapped by map_thread_stack() — retains a valid EL0 read/write translation to that physical frame under its own ASID.
Unprivileged code running in a user thread can drive memory pressure to force eviction and then keep accessing the stale address, obtaining read and write access to whatever the kernel subsequently placed in that frame: supervisor data, another memory domain's partition, or another thread's stack. This defeats the isolation that CONFIG_USERSPACE is meant to enforce, allowing information disclosure and memory corruption up to full compromise of the system.
The fix switches the implementation to TLBI VAAE1{IS}, which matches every ASID and both global and non-global entries, so no domain-tagged translation survives a page out, dirty-bit update or access-flag clear. Exploitation requires an arm64 build with both CONFIG_USERSPACE and CONFIG_DEMAND_PAGING enabled, an active backing store, and at least one demand-paged page that is also privately mapped into a user memory domain. The same commit additionally stops globalize_table() from stripping EL0 permission and non-global attributes off domain-private leaves during paging synchronization, which previously caused user threads to lose access to their own partitions and stacks.
Referencias (2)
Resumen traducido automáticamente de la descripción original. Fuente: Nureq Monitor. Cómo funciona.